1. Field of the Invention
The present invention relates to an operational amplifier device, and more particularly, to an operational amplifier device capable of using transmission gates for capacitance compensation.
2. Description of the Prior Art
Generally, a transmission gate is implemented by an N-TYPE metal-oxide-semiconductor transistor and a P-TYPE metal-oxide-semiconductor transistor. Via adjusting gate voltages of the N-TYPE metal-oxide-semiconductor transistor and the P-TYPE metal-oxide-semiconductor transistor, it is possible to control a turning on and turning off of the transmission gate, to decide whether to output a voltage received by the transmission gate through a transmission output terminal to an external load, e.g. to transmit an output voltage of an operational amplifier to an external load.
For example, please refer to FIG. 1A, which is a schematic diagram of a conventional operational amplifier device 10. As shown in FIG. 1A, the operational amplifier device 10 includes an operational amplifier 102 and a transmission gate 104. The operational amplifier 102 includes an input stage 106, a gain stage 108 and an output stage 110, and the transmission gate 104 includes an N-TYPE metal-oxide-semiconductor transistor MN0 and a P-TYPE metal-oxide-semiconductor transistor MP0. Simply put, when levels of an input voltage Vi of a positive signal input terminal PSIi of the input stage 106 change, the gain stage 108 charges or discharges Miller capacitors Cc1 and Cc2, to raise or lower a voltage VPI of a positive signal input terminal PSI, and a voltage VNI of a negative signal input terminal NSIo of the output stage 110, so as to change levels of an output voltage Vo outputted by a signal output terminal SO of the output stage 110. Moreover, since the signal output terminal SO of the output stage 110 and a negative signal input terminal NSIi of the input stage 106 are coupled to form a negative feedback loop, the levels of the output voltage Vo can be maintained at the levels of the input voltage Vi. Furthermore, it is possible to further control a turning on and turning off of the transmission gate 104 coupled between the signal output terminal SO and a transmission output terminal TO via adjusting transmission control signals SN and SP that are coupled to transmission control terminals TCN0, TCP0 (e.g. gate terminals) of the N-TYPE metal-oxide-semiconductor transistor MN0 and the P-TYPE metal-oxide-semiconductor transistor MP0, respectively, so as to decide whether the transmission gate 104 transmits the received output voltage Vo to the output terminal TO to provide an output voltage Vout to an external load.
Specifically, please refer to FIG. 1B, which is a schematic diagram of details of the output stage 110 in FIG. 1A. As shown in FIG. 1B, the output stage 110 further includes an N-TYPE metal-oxide-semiconductor transistor MN1 and a P-TYPE metal-oxide-semiconductor transistor MP1. When the input voltage Vi switches to a high level, the gain stage 108 discharges the Miller capacitors Cc1 and Cc2 to lower the voltages VPI and VNI, to turn on the P-TYPE metal-oxide-semiconductor transistor MP1 and turn off the N-TYPE metal-oxide-semiconductor transistor MN1, such that a system voltage VDD charges the output voltage Vo, in turn raising the output voltage Vo to a high voltage level of the input voltage Vi. Conversely, when the input voltage Vi switches to a low voltage level, the gain stage 108 charges the Miller capacitors Cc1 and Cc2 to raise the voltages VPI and VNI, to turn on the N-TYPE metal-oxide-semiconductor transistor MN1 and turn off the P-TYPE metal-oxide-semiconductor transistor MP1, such that a grounding terminal discharges the output voltage Vo, in turn lowering the output voltage Vo to a low voltage level of the input voltage Vi.
On the other hand, please refer to FIG. 1C, which is a schematic diagram of the input voltage Vi, the output voltages Vo, Vout and the transmission control signals SN and SP in FIG. 1A. As shown in FIG. 1C, during a charge period T1, the input voltage Vi is at a high voltage level, and the transmission control signals SN and SP are at a low voltage level and a high voltage level, respectively; thus, the transistors MN0 and MP0 of the transmission gate 104 are both turned off, causing the output voltage Vout of the transmission output terminal to be at a low voltage level (e.g. 0). Moreover, since the input voltage Vi is at a high voltage level, the gain stage 108 discharges the Miller capacitors Cc1 and Cc2 to raise the output voltage Vo to a high voltage level of the input voltage Vi, as mentioned. Next, during a positive voltage transmission period T2, the transmission control signals SN and SP are switched to a high voltage level and a low voltage level, respectively. Therefore, the transistors MN0 and MP0 of the transmission gate 104 are both conducting; the output voltage Vout of the transmission output terminal TO rises after receiving an output voltage Vo of a high voltage level, and the output voltage Vo falls due to charge sharing with the output voltage Vout. However due to negative feedback, the gain stage 108 would again discharge the Miller capacitors Cc1 and Cc2 to raise the output voltage Vo to a high voltage level of the input voltage Vi, and also raise the output voltage Vout of the transmission output terminal TO to a high voltage level of the input voltage Vi. Conversely, an opposite operation of the above-mentioned applies when the input voltage Vi is at a low voltage level during a discharge period T3 and a negative voltage transmission period T4, and thus is not described here in further detail.
A conventional method for increasing stability of operational amplifiers is to use a bigger Miller capacitor. However this increases internal charge and discharge time of the Miller capacitor in the operational amplifiers, i.e. more time is needed to lower or raise a level of the output voltage Vo to that of the input voltage Vi. Consequently, if the transmission gate is turned on before the Miller capacitor is fully charged or discharged, the output stage of the operational amplifier cannot be fully turned on, causing the level of the output voltage Vo to fall short of that of the input voltage Vi, i.e. a slower charge/discharge rate of the load. Hence, it is necessary to improve over the prior art, to increase stability of operational amplifiers without increasing charge and discharge time.